Login / Signup

A hierarchical pipelining architecture and FPGA implementation for lifting-based 2-D DWT.

Chunhui ZhangYun LongFadi J. Kurdahi
Published in: J. Real Time Image Process. (2007)
Keyphrases
  • fpga implementation
  • hardware implementation
  • hardware architecture
  • field programmable gate array
  • image processing algorithms
  • fine grained
  • hierarchical architecture
  • real time
  • machine learning
  • management system