Login / Signup
Natural instruction level parallelism-aware compiler for high-performance QueueCore processor architecture.
Ben Abdallah Abderazek
Masashi Masuda
Arquimedes Canedo
Kenichi Kuroda
Published in:
J. Supercomput. (2011)
Keyphrases
</>
level parallelism
instruction set
multi core processors
parallel processing
memory bandwidth
management system
computer architecture
real time
application specific
floating point