Design and Implementation of a Hybrid, ADC/DAC-Free, Input-Sparsity-Aware, Precision Reconfigurable RRAM Processing-in-Memory Chip.
Junjie WangTeng ZhangShuang LiuYihe LiuYuancong WuShaogang HuTupei ChenYang LiuYuchao YangRu HuangPublished in: IEEE J. Solid State Circuits (2024)
Keyphrases
- reconfigurable hardware
- analog to digital converter
- low cost
- circuit design
- single chip
- memory management
- vlsi implementation
- hardware implementation
- micron cmos
- compute intensive
- modular design
- real time
- design process
- high speed
- image sensor
- dynamic reconfiguration
- computation intensive
- chip design
- low power consumption
- hardware software
- design methodology
- cmos technology
- computational power
- hardware architecture
- physical design
- design tools
- field programmable gate array