A flexible multiplication unit for an FPGA logic block.
Kamal RajagopalanPeter R. SuttonPublished in: ISCAS (4) (2001)
Keyphrases
- modal logic
- lightweight
- high speed
- signal processing
- hardware implementation
- real time
- automated reasoning
- proof theory
- logic programming
- verilog hdl
- logic circuits
- asynchronous circuits
- hardware architecture
- single chip
- defeasible logic
- field programmable gate array
- block size
- floating point
- low cost
- computational complexity