Design of low-power and high-performance 10 nm SRAM using Electrostatically doped TMD TFET.
Niraj Kumar SinghRavi ShankarSuraj VermaManodipan SahooPublished in: ISDCS (2023)
Keyphrases
- low power
- low power consumption
- cmos technology
- power consumption
- single chip
- low cost
- high speed
- vlsi architecture
- power reduction
- logic circuits
- digital signal processing
- nm technology
- power dissipation
- high power
- mixed signal
- signal processor
- gate array
- ultra low power
- wireless transmission
- vlsi circuits
- real time
- low voltage
- design process
- power saving
- design considerations
- embedded dram