A FPGA-Based Systolic Array Prototype Implementing the Quadrant Interlocking Factorization Method.

M. Ch. Karra M. P. Bekakos

Published in: J. Supercomput. (2006)

Keyphrases

factorization method
systolic array
singular value decomposition
data flow
structure from motion
matrix factorization
parallel architecture
hardware implementation
multibody
three dimensional
least squares
negative matrix factorization
point features
image processing