A scalable register file architecture for dynamically scheduled processors.
Steven WallaceNader BagherzadehPublished in: IEEE PACT (1996)
Keyphrases
- multiprocessor architecture
- multi processor
- parallel architecture
- instruction set
- scheduling problem
- parallel processing
- management system
- file system
- database
- processing units
- highly scalable
- parallel algorithm
- content addressable
- scalable distributed
- lightweight
- real time
- parallel computing
- file management
- level parallelism
- commodity hardware
- file structure
- multi core processors
- malware detection
- processing elements
- software architecture
- network architecture
- changing environment
- high performance computing