Optimization of Processor-to-Hardware Module Communications on Spaceborne Hybrid FPGA-based Architectures.
Alejandro CristoKevin FisherJ. Anthony GualtieriRosa M. PérezPablo MartínezPublished in: IEEE Embed. Syst. Lett. (2013)
Keyphrases
- parallel architectures
- hardware implementation
- hardware architecture
- multi core processors
- memory management
- single chip
- field programmable gate array
- optimization problems
- hardware design
- fpga device
- parallel processing
- optimization algorithm
- processor core
- high end
- computer architecture
- hardware and software
- computing systems
- host computer
- low cost
- heterogeneous computing
- memory hierarchy
- ibm zenterprise
- communication systems
- processing elements
- hardware software
- computer systems
- parallel architecture
- parallel processors
- embedded systems
- functional units
- input output
- embedded processors
- general purpose
- evolutionary algorithm
- hardware software partitioning
- real time