Area-Speed Tradeoffs for Hierarchical Field-Programmable Gate Arrays.
Vi Cuong ChanDavid M. LewisPublished in: FPGA (1996)
Keyphrases
- field programmable gate array
- hardware implementation
- embedded systems
- application specific integrated circuits
- digital signal processing
- hardware design
- programmable logic
- parallel computing
- massively parallel
- high speed
- image processing algorithms
- hardware architecture
- fpga technology
- hardware software
- software implementation
- host computer
- parallel programming
- parallel architectures
- high end
- computing systems
- probabilistic model
- real time
- hw sw
- high level
- image processing
- information systems