Login / Signup

A Low-Latency FPGA Accelerator for YOLOv3-Tiny With Flexible Layerwise Mapping and Dataflow.

Minsik KimKyoungseok OhYoungmock ChoHojin SeoXuan Truong NguyenHyuk-Jae Lee
Published in: IEEE Trans. Circuits Syst. I Regul. Pap. (2024)
Keyphrases