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On construction low power and robust clock tree via slew budgeting.
Yeh-Chi Chang
Chun-Kai Wang
Hung-Ming Chen
Published in:
ISPD (2012)
Keyphrases
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low power
power consumption
high speed
low cost
single chip
high power
digital signal processing
power saving
low power consumption
gate array
vlsi circuits
vlsi architecture
logic circuits
wireless transmission
power reduction
image sensor
energy dissipation
signal processor