Implementation of double arbiter PUF and its performance evaluation on FPGA.

Takanori Machida Dai Yamamoto Mitsugu Iwamoto Kazuo Sakiyama

Published in: ASP-DAC (2015)

Keyphrases

hardware implementation
real time
hardware architecture
fpga implementation
neural network
artificial intelligence
high speed
efficient implementation
implementation details
implementation issues
low cost
signal processing
hardware design
software implementation
hardware architectures