A Charge Recycling Technique for the Design of Low Power CMOS Clock Drivers.
Spiridon NikolaidisEfstathios D. Kyriakis-BitzarosPublished in: J. Circuits Syst. Comput. (1999)
Keyphrases
- low power
- power consumption
- high speed
- single chip
- low cost
- low power consumption
- cmos technology
- vlsi architecture
- logic circuits
- power dissipation
- digital signal processing
- ultra low power
- cmos image sensor
- high power
- gate array
- nm technology
- power reduction
- mixed signal
- wireless transmission
- vlsi circuits
- power saving
- design process
- power management
- image sensor
- real time
- error resilience
- embedded systems
- delay insensitive