Low power low voltage CMOS full adder cells based on energy-efficient architecture.
Pankaj KumarRajender Kumar SharmaPublished in: Int. J. Comput. Appl. Technol. (2018)
Keyphrases
- cmos technology
- low power
- energy efficient
- low voltage
- power consumption
- energy efficiency
- power dissipation
- power management
- logic circuits
- mixed signal
- high speed
- low cost
- wireless sensor networks
- energy consumption
- single chip
- vlsi circuits
- sensor networks
- low power consumption
- energy saving
- design considerations
- nm technology
- digital signal processing
- parallel processing
- image sensor
- data flow
- base station
- end to end
- cmos image sensor
- data center
- routing protocol