A Low-Power Integrated Circuit for Interaural Time Delay Estimation Without Delay Lines.
Alfonso Chacon-RodriguezFranco Martin-PirchioSilvana SanudoPedro JuliánPublished in: IEEE Trans. Circuits Syst. II Express Briefs (2009)
Keyphrases
- low power
- integrated circuit
- power consumption
- low cost
- high speed
- power dissipation
- digital signal processing
- single chip
- high power
- vlsi circuits
- wireless transmission
- cmos technology
- vlsi architecture
- networked control systems
- logic circuits
- low power consumption
- real time
- power reduction
- image sensor
- hardware and software
- gate array
- mixed signal
- hardware description language
- signal processor