An FPGA architecture for the Pagerank eigenvector problem.
Séamas McGettrickDermot GeraghtyCiarán McElroyPublished in: FPL (2008)
Keyphrases
- hardware implementation
- hardware architecture
- hardware design
- software implementation
- real time
- random walk
- hardware architectures
- fpga implementation
- systolic array
- ranking algorithm
- dedicated hardware
- pipelined architecture
- management system
- reconfigurable hardware
- linear combination
- low cost
- web search
- field programmable gate array
- fpga technology
- real time image processing
- parallel architecture
- network architecture
- software architecture
- link structure
- web graph
- hardware software
- design methodology
- fpga device
- xilinx virtex
- web mining
- high speed
- principal component analysis
- verilog hdl