Tolerating Soft Errors in Deep Learning Accelerators with Reliable On-Chip Memory Designs.

Arash AziziMazreah Yongbin Gu Xiang Gu Lizhong Chen

Published in: NAS (2018)

Keyphrases

deep learning
single chip
unsupervised learning
unsupervised feature learning
machine learning
nm technology
high speed
ibm power processor
low power
weakly supervised
deep architectures
direct memory access
power consumption
memory access
mental models
higher order
active learning
image processing