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A 5-Gb/s/pin Transceiver for DDR Memory Interface With a Crosstalk Suppression Scheme.

Kwang-Il OhLee-Sup KimKwang-Il ParkYoung-Hyun JunJoo-Sun ChoiKinam Kim
Published in: IEEE J. Solid State Circuits (2009)
Keyphrases
  • high speed
  • user interface
  • memory requirements
  • memory space
  • detection scheme
  • direct manipulation
  • low memory
  • database
  • data sets
  • neural network
  • main memory
  • learning scheme
  • random access
  • bloom filter
  • garbage collection