Login / Signup

FPGA Implementation of an Area-Time Efficient FIR Filter Core Using a Self-Clocked Approach.

J. Javier MartínezF. Javier ToledoF. Javier GarrigósJosé Manuel Ferrández de Vicente
Published in: FPL (2005)
Keyphrases
  • fpga implementation
  • hardware implementation
  • fir filters
  • machine learning
  • image processing
  • real time
  • similarity measure
  • frequency domain
  • field programmable gate array
  • impulse response
  • finite impulse response