A Reconfigurable Frame Interpolation Hardware Architecture for High Definition Video.
Ozgur TasdizenIlker HamzaogluPublished in: DSD (2009)
Keyphrases
- high definition video
- frame interpolation
- motion vectors
- hardware architecture
- hardware implementation
- field programmable gate array
- motion estimation
- motion compensation
- video sequences
- bit rate
- video coding
- motion field
- video data
- computational complexity
- signal processing
- image processing algorithms
- macroblock
- hardware architectures
- efficient implementation
- low cost
- embedded systems
- parallel computing
- processing elements
- video compression
- inter frame
- image processing
- coding efficiency
- rate distortion
- parallel architecture
- motion compensated
- frame rate
- image sequences
- computer vision