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A 1.26-ps-FoM Output-Capacitorless LDO with Dual-Path Active-Feedback Frequency Compensation and Current-Reused Dynamic Biasing in 65-nm CMOS Technology.
Huimin Qian
Jianping Guo
Published in:
ASICON (2019)
Keyphrases
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cmos technology
low voltage
low power
power consumption
spl times
parallel processing
silicon on insulator
high speed
image sensor
clock frequency
neural network
video data