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A 0.6-V/1.2-V low power single ended CMOS LNA for multi-standard RF front-ends.
Abdelhalim Slimane
Sid-Ahmed Tedjini-Bailiche
Abdelkader Taibi
Mohand-Tahar Belaroussi
Djabar Maafri
Published in:
ICM (2014)
Keyphrases
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low power
power consumption
low cost
high speed
single chip
vlsi circuits
wireless transmission
high power
low power consumption
vlsi architecture
cmos technology
image sensor
mixed signal
digital signal processing
logic circuits
ultra low power
delay insensitive
power saving
power dissipation