Multiple context multithreaded superscalar processor architecture.
K. S. LohW. F. WongPublished in: J. Syst. Archit. (2000)
Keyphrases
- multithreading
- instruction set
- parallel computing
- computational power
- multi processor
- computer architecture
- management system
- contextual information
- software architecture
- multi core processors
- industry standard
- highly efficient
- coarse grained
- systolic array
- design considerations
- parallel processing
- conceptual model
- context aware
- low cost