Separating OR, SUM, and XOR Circuits

Magnus Find Mika Göös Matti Järvisalo Petteri Kaski Mikko Koivisto Janne H. Korhonen

Published in: CoRR (2013)

Keyphrases

high speed
delay insensitive
objective function
weighted sum
square error
logic synthesis
neural network
circuit design
vlsi circuits
lateral inhibition
data sets
high level synthesis
chip design
low cost
information systems
data mining
databases