Design-Phase Buffer Allocation for Post-Silicon Clock Binning by Iterative Learning.
Grace Li ZhangBing LiJinglan LiuYiyu ShiUlf SchlichtmannPublished in: CoRR (2017)
Keyphrases
- iterative learning
- buffer allocation
- high speed
- buffer management
- production line
- queueing networks
- iterative learning control
- incremental learning
- production system
- allocation strategy
- error reduction
- low cost
- power consumption
- single server
- real time database systems
- decomposition algorithm
- dynamic programming
- network management
- flowshop
- storage management
- real time
- network architecture
- database systems