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Efficient FPGA Implementations of Pair and Triplet-Based STDP for Neuromorphic Architectures.
Corey Lammie
Tara Julia Hamilton
André van Schaik
Mostafa Rahimi Azghadi
Published in:
IEEE Trans. Circuits Syst. I Regul. Pap. (2019)
Keyphrases
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pairwise
high speed
efficient implementation
neural network
computationally expensive
real time
information retrieval
computer vision
decision trees
computationally efficient
complexity analysis
parallel architectures
software implementation
hardware architectures