An On-Sensor Bit-Serial Column-Parallel Processing Architecture for High-Speed Discrete Fourier Transform.
Tatsuya EkiShoji KawahitoYoshiaki TadokoroPublished in: IEEE Trans. Circuits Syst. II Express Briefs (2006)
Keyphrases
- parallel processing
- discrete fourier transform
- high speed
- distributed processing
- cmos image sensor
- parallel architecture
- real time
- processing units
- parallel computers
- computational power
- processing speed
- analog to digital converter
- frequency domain
- fourier transform
- ibm sp
- low power
- graphic processing unit
- parallel architectures
- cmos technology
- discrete cosine transform
- radon transform
- dynamic range
- pc cluster
- preprocessing
- feature extraction