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Dual-modulus 127/128 FOM enhanced prescaler design in 0.35-/spl mu/m CMOS technology.
Ram Singh Rana
Published in:
IEEE J. Solid State Circuits (2005)
Keyphrases
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cmos technology
spl times
case study
user interface
hidden markov models
low power
power dissipation
design process
image processing
parallel processing
design considerations