Login / Signup
A Semi-Digital Delay Locked Loop for Clock Skew Minimization.
Joonbae Park
Yido Koo
Wonchan Kim
Published in:
VLSI Design (1999)
Keyphrases
</>
high speed
objective function
power consumption
phase locked loop
multimedia
information retrieval
low power
digital curves
genetic algorithm
image segmentation
digital libraries
shortest path
end to end
digital content
critical path