FPGA Implementation of High Speed Baugh-Wooley Multiplier using Decomposition Logic.
Ananda KiranNavdeep PrasharPublished in: CoRR (2015)
Keyphrases
- fpga implementation
- hardware implementation
- high speed
- efficient implementation
- signal processing
- low power
- high speed networks
- field programmable gate array
- logic programming
- modal logic
- image processing algorithms
- decomposition method
- logic synthesis
- artificial intelligence
- floating point
- multiscale
- access control
- low cost
- co occurrence
- classical logic
- control system
- computer vision