Login / Signup
Design of an Iteration-Reduced LDPC-CC Decoder Based on Compact Decoding Architecture.
Liangxi Liu
Ming Zhan
Mingjuan Qiu
Meng Wang
Xiaohong Luo
Jing Guo
Published in:
IECON (2020)
Keyphrases
</>
software architecture
decoding algorithm
low density parity check
architectural design
ldpc codes
vlsi architecture
design methodology
turbo codes
decoding process
design process
low complexity
design principles
error correction
platform independent
hardware architecture
video decoder