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Low-Power Design for a Digit-Serial Polynomial Basis Finite Field Multiplier Using Factoring Technique.
Shoaleh Hashemi Namin
Huapeng Wu
Majid Ahmadi
Published in:
IEEE Trans. Very Large Scale Integr. Syst. (2017)
Keyphrases
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single chip
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vlsi architecture
logic circuits
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cmos technology
gate array
wireless transmission
digital signal processing
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