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with 700ps controller delay and network-on-chip load in 45-nm SOI.
Noah Sturcken
Michele Petracca
Steve B. Warren
Luca P. Carloni
Angel V. Peterchev
Kenneth L. Shepard
Published in:
CICC (2011)
Keyphrases
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network on chip
power dissipation
cmos technology
silicon on insulator
power consumption
low power
routing algorithm
control system
digital signal processing
load balancing
network simulator
real time
end to end delay
finite state machines
design methodology
energy efficiency
distributed systems