Design and Validation of Arbiter-Based PUFs for Sub-45-nm Low-Power Security Applications.
Lang LinSudheendra SrivathsaDilip Kumar KrishnappaPrasad ShabadiWayne P. BurlesonPublished in: IEEE Trans. Inf. Forensics Secur. (2012)
Keyphrases
- low power
- cmos technology
- single chip
- power consumption
- low cost
- vlsi architecture
- nm technology
- logic circuits
- power reduction
- low power consumption
- digital signal processing
- high speed
- gate array
- information security
- mixed signal
- design process
- wireless transmission
- power dissipation
- general purpose
- hardware and software
- embedded systems