Low power cache architectures with hybrid approach of filtering unnecessary way accesses.
Lingjun FanShinan WangYasong ZhengWeisong ShiDongrui FanPublished in: PMAM (2013)
Keyphrases
- low power
- low cost
- power consumption
- high speed
- memory hierarchy
- access patterns
- memory access
- prefetching
- high power
- single chip
- vlsi architecture
- vlsi circuits
- wireless transmission
- main memory
- cmos technology
- power reduction
- digital signal processing
- logic circuits
- signal processor
- query processing
- delay insensitive
- low power consumption
- memory management
- response time