An architecture and design tool flow for embedding a virtual FPGA into a reconfigurable system-on-chip.
Tobias WiersemaArne BockhornMarco PlatznerPublished in: Comput. Electr. Eng. (2016)
Keyphrases
- design tools
- field programmable gate array
- embedded systems
- hardware implementation
- low cost
- digital signal
- computer aided
- systolic array
- hardware and software
- power reduction
- physical design
- design space
- hardware design
- power consumption
- real time
- reconfigurable hardware
- augmented reality
- virtual world
- virtual environment
- hardware software
- hardware software partitioning
- virtual reality
- high speed
- hardware architecture
- design methodology
- neural network
- instructional design
- learning scenarios
- signal processing
- image analysis
- expert systems
- multimedia
- artificial intelligence