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The survivability of design-specific spare placement in FPGA architectures with high defect rates.
Amit Agarwal
Jason Cong
Brian Tagiku
Published in:
ACM Trans. Design Autom. Electr. Syst. (2013)
Keyphrases
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hardware architecture
high speed
domain specific
design process
low power consumption
case study
functional requirements
hardware design
image processing
high level
wide range
low cost
building blocks
power reduction