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A novel 10T SRAM bit-cell with high static noise margin and low power consumption for binary In-Memory Computing.
Hossein Khosravi
Ricardo Carmona-Galán
Jorge Fernández-Berni
Nabeeh Kandalaft
Published in:
CCWC (2024)
Keyphrases
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low power consumption
power consumption
low power
random access memory
low cost
real time
storage devices
high speed
application specific
power dissipation
signal to noise ratio
low voltage
field programmable gate array