Throughput in a counterflow pipeline processor.
Aimee SeversonBrent NelsonPublished in: SIGARCH Comput. Archit. News (1995)
Keyphrases
- parallel architecture
- response time
- application specific
- parallel processing
- clock frequency
- instruction set
- computer architecture
- high speed
- pipeline architecture
- congestion control
- general purpose
- single chip
- distributed memory
- high end
- low latency
- allocation scheme
- industry standard
- higher throughput
- database systems