A 276 nW, area-eficient CMOS subbandgap reference circuit.

Vahid Bonehi Soheil Aghaie Kai Hussmann Ralf Wunderlich Stefan Heinen

Published in: ISCAS (2017)

Keyphrases

circuit design
high speed
analog vlsi
delay insensitive
low voltage
vlsi circuits
cmos technology
logic circuits
neural network
power dissipation
low power
reference images
asynchronous circuits
frequency response
power consumption
electronic circuits
low cost
information systems
real time
flip flops