Prototype low power WTA circuits for programmable neural networks.
Krzysztof WawrynBogdan StrzeszewskiPublished in: ISCAS (2000)
Keyphrases
- low power
- low cost
- neural network
- high speed
- single chip
- logic circuits
- competitive learning
- cmos technology
- signal processor
- power consumption
- delay insensitive
- vlsi circuits
- power reduction
- power dissipation
- mixed signal
- digital signal processing
- self organizing maps
- image sensor
- pattern recognition
- high power
- wireless transmission
- vlsi architecture
- low power consumption
- image processing
- real time
- general purpose
- embedded systems
- information theoretic
- gate array