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System level interconnect design for network-on-chip using interconnect IPs.

Jian LiuMeigen ShenLi-Rong ZhengHannu Tenhunen
Published in: SLIP (2003)
Keyphrases
  • power dissipation
  • network on chip
  • design process
  • high speed
  • power consumption
  • low power
  • quality of service
  • ad hoc networks
  • design methodology
  • digital signal processing