Low Computational Complexity, Low Power, and Low Area Design for the Implementation of Recursive DFT and IDFT Algorithms.
Shin-Chi LaiSheau-Fang LeiChia-Lin ChangChen-Chieh LinChing-Hsing LuoPublished in: IEEE Trans. Circuits Syst. II Express Briefs (2009)
Keyphrases
- low power
- low power consumption
- computational complexity
- digital signal processing
- power consumption
- efficient implementation
- vlsi architecture
- low cost
- single chip
- ultra low power
- cmos technology
- high speed
- power dissipation
- logic circuits
- high computational complexity
- wireless transmission
- design considerations
- mixed signal
- special purpose
- signal processor
- high power
- processing capabilities
- real time
- hardware implementation
- general purpose
- image processing