Booth-NeRF: An FPGA Accelerator for Instant-NGP Inference with Novel Booth-Multiplier.

Zihang Ma Zeyu Li Yuanfang Wang Yu Li Jun Yu Kun Wang

Published in: ASPDAC (2024)

Keyphrases

field programmable gate array
hardware implementation
probabilistic inference
low cost
high speed
software implementation
genetic algorithm
image processing
signal processing
maximum likelihood
parallel implementation
image processing algorithms
parallel computing
structured prediction
real time image processing