Implementation of a burst error and burst erasure channel emulator using an FPGA architecture.
Massimo RigoCaterina TravanFrancesca VattaFulvio BabichPublished in: SoftCOM (2014)
Keyphrases
- hardware architecture
- hardware implementation
- fpga technology
- software implementation
- dedicated hardware
- hardware architectures
- hardware design
- parallel architecture
- layered architecture
- reconfigurable hardware
- field programmable gate array
- xilinx virtex
- fpga implementation
- real time
- fpga device
- design methodology
- efficient implementation
- channel coding
- signal processing
- systolic array
- fpga hardware
- architectural design
- low cost
- management system
- hardware software