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A novel multiplexer-based low-power full adder.
Yingtao Jiang
Abdulkarim Al-Sheraidah
Yuke Wang
Edwin Hsing-Mean Sha
Jin-Gyun Chung
Published in:
IEEE Trans. Circuits Syst. II Express Briefs (2004)
Keyphrases
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low power
logic circuits
power dissipation
power consumption
low cost
high speed
single chip
digital signal processing
high power
wireless transmission
gate array
low power consumption
vlsi architecture
power reduction
cmos technology
real time
embedded systems
digital camera
delay insensitive