Formal Verification of FPGA Cores.
Carl Johan LillierothSatnam SinghPublished in: Nord. J. Comput. (1999)
Keyphrases
- formal verification
- model checking
- general purpose processors
- field programmable gate array
- model checker
- automated verification
- high speed
- symbolic model checking
- bounded model checking
- hardware implementation
- level parallelism
- real time image processing
- verilog hdl
- hardware architectures
- signal processing
- hardware architecture
- hardware design
- low cost
- real time
- single chip
- temporal logic
- fpga implementation
- multi core processors
- program slicing
- low power
- fpga device
- embedded systems
- open source