A 192-Gb 12-High 896-GB/s HBM3 DRAM With a TSV Auto-Calibration Scheme and Machine-Learning-Based Layout Optimization.
Myeong-Jae ParkJinhyung LeeKyungjun ChoJi Hwan ParkJunil MoonSung-Hak LeeTae-Kyun KimSanghoon OhSeokwoo ChoiYongsuk ChoiHo Sung ChoTae-Sik YunYoung Jun KooJae-Seung LeeByung Kuk YoonYoung Jun ParkSangmuk OhChang Kwon LeeSeong-Hee LeeHyun-Woo KimYucheon JuSeung-Kyun LimKyo Yun LeeSang-Hoon LeeWoo Sung WeSeungchan KimSeung Min YangKeonho LeeIn-Keun KimYounghyun JeonJae-Hyung ParkJong Chan YunSeonyeol KimDong-Yeol LeeSu-Hyun OhJunghyun ShinYeonho LeeJieun JangJoohwan ChoPublished in: IEEE J. Solid State Circuits (2023)