Login / Signup
A versatile 3.3/2.5/1.8-V CMOS I/O driver built in a 0.2-μm, 3.5-nm Tox, 1.8-V CMOS technology.
Hector Sanchez
Joshua Siegel
Carmine Nicoletta
James P. Nissen
José Alvarez
Published in:
IEEE J. Solid State Circuits (1999)
Keyphrases
</>
cmos technology
low power
low voltage
parallel processing
spl times
power consumption
silicon on insulator
low cost
input output
high speed
image sensor
real time
single chip
digital signal processing
power dissipation