Low power enhancements for parallel algorithms.
Stephan KlaukeJürgen GötzePublished in: ISCAS (4) (2001)
Keyphrases
- parallel algorithm
- low power
- power consumption
- low cost
- high speed
- parallel computation
- high power
- shared memory
- parallel programming
- single chip
- wireless transmission
- digital signal processing
- logic circuits
- low power consumption
- real time
- parallel computers
- parallel version
- image sensor
- mixed signal
- cmos technology
- vlsi architecture
- pc cluster
- vlsi circuits
- power reduction
- graphical models
- gate array